The background description provided herein is for the purpose of generally presenting the context of the disclosure. Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
Traditionally, high performance computing (HPC) and enterprise data center computing are optimized for different types of applications. Those within the data center are largely transaction-oriented while HPC applications crunch numbers and high volumes of data. However, driven by business-oriented analytics applications, e.g., Artificial intelligence (AI), HPC plays a more and more important role in data center computing. HPC systems have made tremendous progress, but still face many obstacles to further improve their performance. For example, the throughput per unit area and energy efficiency of integrated circuits (ICs) in current HPC systems may be limited. HPC systems may be built using multi-tile processor ICs that may include multiple processor tiles. A processor tile may include a computing element, a processor core, a core, a processing engine, an execution unit, a central processing unit (CPU), caches, switches, and other components. A large number of processor tiles may be formed on a die. Efforts to advance the performance of HPC system ICs may have focused largely on advancing performance of component parts while holding the division of labor for a workload between the components relatively stable. Incremental advances in component performance are ultimately bounded.